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2011•Unpublished venueRequires access

A low-power and low-complexity chopper-stabilized amplifier

K. Wang, Zhaohui Wu, Ming Jian Zhao, B. Li

Open publisher page 3 citations

Abstract

In this paper, a low-power, low-complexity chopper amplifier was proposed. The equivalent input noise and offset is reduced by using the chopper stabilization technique with a chopping frequency of 1.0 MHz. Based on a 0.35μm CMOS technology with power supply of 3.3V, the chopper amplifier was designed successfully with chip area of 0.02 mm2and power of 0.25 mW and achieved the PSRR of 112 dB and the CMRR of 108 dB.

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What this paper is about

In this paper, a low-power, low-complexity chopper amplifier was proposed. The equivalent input noise and offset is reduced by using the chopper stabilization technique with a chopping frequency of 1.0 MHz. Based on a 0.35μm CMOS technology with power supply of 3.3V, the chopper amplifier was designed successfully with chip area of 0.02 mm2and power of 0.25 mW and achieved the PSRR of 112 dB and the CMRR of 108 dB.

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Available abstract

In this paper, a low-power, low-complexity chopper amplifier was proposed. The equivalent input noise and offset is reduced by using the chopper stabilization technique with a chopping frequency of 1.0 MHz. Based on a 0.35μm CMOS technology with power supply of 3.3V, the chopper amplifier was designed successfully with chip area of 0.02 mm2and power of 0.25 mW and achieved the PSRR of 112 dB and the CMRR of 108 dB.

Key concepts: Chopper, Power supply rejection ratio, Amplifier, CMOS, Electrical engineering, Offset (computer science), Power (physics), Electronic engineering

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