Addressing mechanisms for VLIW and superscalar processors
F.L. Steven, R.G. Adams, G.B. Steven, L. Wang, D.J. Whale
Abstract
F.L. Steven, R.G. Adams, G.B. Steven, L. Wang, D.J. Whale
Abstract
An abstract is not available in the OpenAlex record for this paper.
OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
Key concepts: Very long instruction word, Superscalar, Computer science, Instructions per cycle, Parallel computing, Reduced instruction set computing, Computer architecture, Instruction-level parallelism