1991Electronics LettersRequires access

New bit-serial systolic multiplier for GF (2 m ) using irreducible trinomials

Menouer Diab, Alain Poli

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Abstract

A bit-serial systolic architecture is presented for the product-sum computation P = AB + C in a finite field GF(2m) = GF(2)[x]/[F(x)], such that F(x) = xm + x + 1 is an irreducible trinomial over GF(2). It has a low complexity and does not require connections for the serial transfer of F(x).

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What this paper is about

A bit-serial systolic architecture is presented for the product-sum computation P = AB + C in a finite field GF(2m) = GF(2)[x]/[F(x)], such that F(x) = xm + x + 1 is an irreducible trinomial over GF(2). It has a low complexity and does not require connections for the serial transfer of F(x).

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OpenAlex reports 19 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

A bit-serial systolic architecture is presented for the product-sum computation P = AB + C in a finite field GF(2m) = GF(2)[x]/[F(x)], such that F(x) = xm + x + 1 is an irreducible trinomial over GF(2). It has a low complexity and does not require connections for the serial transfer of F(x).

Key concepts: Trinomial, GF(2), Finite field, Mathematics, Multiplier (economics), Arithmetic, Computation, Discrete mathematics

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