J. Lacord, P. Batude, G. Ghibaudo, F. Boeuf
Abstract
In this paper, we estimate using an analytical model the parasitic capacitances of 3D inverters based on 3D sequential integration. Total capacitance and delay are evaluated for two different contact schemes (plug and bar contact) and compared with a 2D reference.
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In this paper, we estimate using an analytical model the parasitic capacitances of 3D inverters based on 3D sequential integration. Total capacitance and delay are evaluated for two different contact schemes (plug and bar contact) and compared with a 2D reference.
Key concepts: Parasitic extraction, Parasitic capacitance, Capacitance, Electronic engineering, Solid modeling, Bar (unit), Computer science, Materials science