2008•Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIERequires access

Status of EUV reticle handling solution in meeting 32 nm HP EUV lithography

Long He, Stefan Wurm, Phil Seidel, Kevin J. Orvek, Ernie Betancourt, Jon Underwood

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Abstract

Significant progress has been made over the past several years in developing extreme ultraviolet (EUV) mask infrastructure, especially in EUV reticle handling and protection. Today, the industry has converged to standardize the dual pod reticle carrier approach in developing EUV reticle handling solutions. SEMATECH has already established reticle handling infrastructure compliant with industry's draft standard, including carrier, robotic carrier handling, automated carrier cleaning, vacuum protection, and state-of-the-art particulate contamination testing capabilities. It proves to be one of the key enablers in developing EUV reticle protection solutions, through broad collaboration with industry stakeholders and suppliers. In this paper, we discuss our in-house reticle handling infrastructure and provide insights on how to apply it in EUV lithography pilot line development and future production line. We present particulate contamination free baseline results of state-of-the-art EUV reticle carriers, i.e., sPod, throughout lifecycle uses. We will also compare the results against requirements for 32 nm half-pitch (HP) EUV lithography, to identify the remaining challenges ahead of the industry.

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What this paper is about

Significant progress has been made over the past several years in developing extreme ultraviolet (EUV) mask infrastructure, especially in EUV reticle handling and protection. Today, the industry has converged to standardize the dual pod reticle carrier approach in developing EUV reticle handling solutions. SEMATECH has already established reticle handling infrastructure compliant with industry's draft standard, including carrier, robotic carrier handling, automated carrier cleaning, vacuum protection, and state-of-the-art particulate contamination testing capabilities. It proves to be one of the key enablers in developing EUV reticle protection solutions, through broad collaboration with industry stakeholders and suppliers. In this paper, we discuss our in-house reticle handling infrastructure and provide insights on how to apply it in EUV lithography pilot line development and future production line. We present particulate contamination free baseline results of state-of-the-art EUV reticle carriers, i.e., sPod, throughout lifecycle uses. We will also compare the results against requirements for 32 nm half-pitch (HP) EUV lithography, to identify the remaining challenges ahead of the industry.

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Available abstract

Significant progress has been made over the past several years in developing extreme ultraviolet (EUV) mask infrastructure, especially in EUV reticle handling and protection. Today, the industry has converged to standardize the dual pod reticle carrier approach in developing EUV reticle handling solutions. SEMATECH has already established reticle handling infrastructure compliant with industry's draft standard, including carrier, robotic carrier handling, automated carrier cleaning, vacuum protection, and state-of-the-art particulate contamination testing capabilities. It proves to be one of the key enablers in developing EUV reticle protection solutions, through broad collaboration with industry stakeholders and suppliers. In this paper, we discuss our in-house reticle handling infrastructure and provide insights on how to apply it in EUV lithography pilot line development and future production line. We present particulate contamination free baseline results of state-of-the-art EUV reticle carriers, i.e., sPod, throughout lifecycle uses. We will also compare the results against requirements for 32 nm half-pitch (HP) EUV lithography, to identify the remaining challenges ahead of the industry.

Key concepts: Reticle, Extreme ultraviolet lithography, Extreme ultraviolet, Lithography, Computer science, Photolithography, Interference lithography, Systems engineering

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