2007ITC-CSCC :International Technical Conference on Circuits Systems, Computers and CommunicationsRequires access

Low-cost implementation for an Angle-of-Arrival Estimator in UWB systems

Kwi-Beum Han, Seongjoo Lee, Yeong-Seok Jeong, Joon‐Ho Lee

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Abstract

This paper proposes the low-cost implementation method for an angle-of-arrival (AOA) estimator based on the multiple signal identification and classification (MUSIC) algorithm in UWB systems adapting Multi-band OFDM (MB-OFDM) techniques with two-transmit and two-receive (2x2) antennas. In the proposed method, by modifying the equations of algorithm in order to remove the high compuational functions, the computation power can be significantly reduced without significant performance degradation. The proposed architecture is designed and verified by Verilog HDL, and reduces the estimated computation power by 96.70% compared to the architecture employing the original MUSIC algorithm.

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What this paper is about

This paper proposes the low-cost implementation method for an angle-of-arrival (AOA) estimator based on the multiple signal identification and classification (MUSIC) algorithm in UWB systems adapting Multi-band OFDM (MB-OFDM) techniques with two-transmit and two-receive (2x2) antennas. In the proposed method, by modifying the equations of algorithm in order to remove the high compuational functions, the computation power can be significantly reduced without significant performance degradation. The proposed architecture is designed and verified by Verilog HDL, and reduces the estimated computation power by 96.70% compared to the architecture employing the original MUSIC algorithm.

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Available abstract

This paper proposes the low-cost implementation method for an angle-of-arrival (AOA) estimator based on the multiple signal identification and classification (MUSIC) algorithm in UWB systems adapting Multi-band OFDM (MB-OFDM) techniques with two-transmit and two-receive (2x2) antennas. In the proposed method, by modifying the equations of algorithm in order to remove the high compuational functions, the computation power can be significantly reduced without significant performance degradation. The proposed architecture is designed and verified by Verilog HDL, and reduces the estimated computation power by 96.70% compared to the architecture employing the original MUSIC algorithm.

Key concepts: Estimator, Computer science, Computation, Orthogonal frequency-division multiplexing, Angle of arrival, Power (physics), SIGNAL (programming language), Algorithm

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