2002Unpublished venueRequires access

Low power via reduced switching activity and its application to PLAs

Rakib Hossain, A. Albicki

Open publisher page 9 citations

Abstract

In this paper a systematic study of the expected switching activity (ESA) in combinational logic circuits is presented. Based on this study, a technique for reducing the power dissipation in two-level combinational logic is presented. The paper also discusses the switching activity in multilevel circuits.>

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What this paper is about

In this paper a systematic study of the expected switching activity (ESA) in combinational logic circuits is presented. Based on this study, a technique for reducing the power dissipation in two-level combinational logic is presented. The paper also discusses the switching activity in multilevel circuits.>

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OpenAlex reports 9 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

In this paper a systematic study of the expected switching activity (ESA) in combinational logic circuits is presented. Based on this study, a technique for reducing the power dissipation in two-level combinational logic is presented. The paper also discusses the switching activity in multilevel circuits.>

Key concepts: Combinational logic, Logic gate, Computer science, Electronic circuit, Power (physics), Logic synthesis, Sequential logic, Dissipation

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