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2006•대한전자공학회 ISOCCRequires access

A low-jitter multi-phase All Digital Phase Locked Loops for 5Gbps SerDes Applications

Seung-Hoon Jung, Yun-Jeong Kim

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Key concepts: SerDes, Jitter, Phase (matter), Computer science, Physics, Computer hardware, Telecommunications, Quantum mechanics

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A low-jitter multi-phase All Digital Phase Locked Loops for 5Gbps SerDes Applications — Research Paper | ScholarLens