High Power Doherty Amplifier Design for UMTS Application
Asdesach Z. Markos, Guenter Kompa
Abstract
Asdesach Z. Markos, Guenter Kompa
Abstract
PA) using laterally diffused metal oxide semiconductor (LDMOS) technology is presented. A low impedance thru-reflect-line (TRL) calibration technique has been used to characterize the device and verify the large signal model of a commercial 10W packaged LDMOS device. A Doherty amplifier is designed using two of the 10W LDMOS devices as class AB main amplifier and class C peaking amplifier. A peak power added efficiency (PAE) of 52% (59% drain efficiency) and 45% has been simulated at the saturated output power of 43 dBm and 6 dB back off, respectively.
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PA) using laterally diffused metal oxide semiconductor (LDMOS) technology is presented. A low impedance thru-reflect-line (TRL) calibration technique has been used to characterize the device and verify the large signal model of a commercial 10W packaged LDMOS device. A Doherty amplifier is designed using two of the 10W LDMOS devices as class AB main amplifier and class C peaking amplifier. A peak power added efficiency (PAE) of 52% (59% drain efficiency) and 45% has been simulated at the saturated output power of 43 dBm and 6 dB back off, respectively.
Key concepts: LDMOS, Amplifier, Doherty amplifier, RF power amplifier, Electrical engineering, Power-added efficiency, Materials science, FET amplifier