Distributed source-destination synchronization
C.-S. Li, Y. Ofek
Abstract
C.-S. Li, Y. Ofek
Abstract
This paper presents a new distributed methodology for source-destination synchronization for interactive teleconferencing. The method is based on a reference clock, which is synthesized from a distributed global clock. The global clock is generated by periodically exchanging inband synchronization signals with neighbouring nodes. The timing jitter achieved with this method can be arbitrarily close to the jitter obtained by the centralized synchronous methods which usually use an out-of-band, hard-wired reference clock. The global clock synchronization algorithm guarantees frequency locking of all the network nodes to the slowest clock in the system. As a result, the slowest clock can be used as an implicit reference clock for source-destination synchronization protocols, such as, the synchronous frequency encoding technique (SFET) and the synchronous residual time stamp (SRTS). This inband synchronization method does not require the explicit knowledge of which clock is actually the slowest in the system. Therefore, if the slowest clock fails, then another clock on a different node will be the slowest, and the nodes will use it as a reference clock for the source-destination synchronization protocol. The existing out-of-band reference clock techniques do not have this strong fault tolerant property. The main context of this work is circuit emulation in ATM networks.
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This paper presents a new distributed methodology for source-destination synchronization for interactive teleconferencing. The method is based on a reference clock, which is synthesized from a distributed global clock. The global clock is generated by periodically exchanging inband synchronization signals with neighbouring nodes. The timing jitter achieved with this method can be arbitrarily close to the jitter obtained by the centralized synchronous methods which usually use an out-of-band, hard-wired reference clock. The global clock synchronization algorithm guarantees frequency locking of all the network nodes to the slowest clock in the system. As a result, the slowest clock can be used as an implicit reference clock for source-destination synchronization protocols, such as, the synchronous frequency encoding technique (SFET) and the synchronous residual time stamp (SRTS). This inband synchronization method does not require the explicit knowledge of which clock is actually the slowest in the system. Therefore, if the slowest clock fails, then another clock on a different node will be the slowest, and the nodes will use it as a reference clock for the source-destination synchronization protocol. The existing out-of-band reference clock techniques do not have this strong fault tolerant property. The main context of this work is circuit emulation in ATM networks.
Key concepts: Clock synchronization, Clock drift, Clock domain crossing, Computer science, Self-clocking signal, Digital clock manager, Jitter, Master clock