2003•Unpublished venueRequires access

Architectural features of the i860-microprocessor RISC core and on-chip caches

P. Patel, D. Douglass

Open publisher page 8 citations

Abstract

The Intel i860 is a one-million-transistor, high-performance RISC (reduced-instruction-set computer) microprocessor. The performance of the i860 CPU is derived using supercomputer architectural concepts such as parallel instruction execution and a 64-b architecture that provides the data and instruction bandwidth necessary to support multiple operations. The novel features of the i860 RISC integer core are explored. The on-chip cache architecture, which is optimized for large data and instruction bandwidth, is described.>

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What this paper is about

The Intel i860 is a one-million-transistor, high-performance RISC (reduced-instruction-set computer) microprocessor. The performance of the i860 CPU is derived using supercomputer architectural concepts such as parallel instruction execution and a 64-b architecture that provides the data and instruction bandwidth necessary to support multiple operations. The novel features of the i860 RISC integer core are explored. The on-chip cache architecture, which is optimized for large data and instruction bandwidth, is described.>

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OpenAlex reports 8 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The Intel i860 is a one-million-transistor, high-performance RISC (reduced-instruction-set computer) microprocessor. The performance of the i860 CPU is derived using supercomputer architectural concepts such as parallel instruction execution and a 64-b architecture that provides the data and instruction bandwidth necessary to support multiple operations. The novel features of the i860 RISC integer core are explored. The on-chip cache architecture, which is optimized for large data and instruction bandwidth, is described.>

Key concepts: Reduced instruction set computing, Computer science, Microprocessor, Instruction set, Bandwidth (computing), Architecture, Cache, Operating system

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