ScholarLens Back to search
2015•Unpublished venueRequires access

From fan-out wafer to fan-out panel level packaging

Tanja Braun, Karl‐Friedrich Becker, S. Raatz, V. Bader, J. Bauer, R. Aschenbrenner, S. Voges, T. Thomas, R. Kahle, K.-D. Lang

Open publisher page 18 citations

Abstract

Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics for heterogeneous system integration. This paper describes the technological path from wafer level embedding to 24"×18" fan-out panel level packaging technology in combination with low cost PCB based RDL processes and discusses challenges and opportunities in detail. The technology described offers a cost effective packaging solution for various application as autonomous sensor nodes, packages for handheld consumer application or bio-medical application as sensor integration into microfluidics.

About this research paper

What this paper is about

Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics for heterogeneous system integration. This paper describes the technological path from wafer level embedding to 24"×18" fan-out panel level packaging technology in combination with low cost PCB based RDL processes and discusses challenges and opportunities in detail. The technology described offers a cost effective packaging solution for various application as autonomous sensor nodes, packages for handheld consumer application or bio-medical application as sensor integration into microfluidics.

Why it matters

OpenAlex reports 18 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Fan-out Wafer Level Packaging (FOWLP) is one of the latest packaging trends in microelectronics for heterogeneous system integration. This paper describes the technological path from wafer level embedding to 24"×18" fan-out panel level packaging technology in combination with low cost PCB based RDL processes and discusses challenges and opportunities in detail. The technology described offers a cost effective packaging solution for various application as autonomous sensor nodes, packages for handheld consumer application or bio-medical application as sensor integration into microfluidics.

Key concepts: Fan-out, Wafer-level packaging, Microelectronics, Wafer, Wafer-scale integration, Packaging engineering, Engineering, Fan-in

Related papers

Related paper 1Related paper 2Related paper 3
Back to paper searchBrowse research topicsOriginal source
From fan-out wafer to fan-out panel level packaging — Research Paper | ScholarLens