Decomposed crossbar switches with multiple input and output buffers
Seung Yeob Nam, Dan Keun Sung
Abstract
Seung Yeob Nam, Dan Keun Sung
Abstract
Conventional input switches usually employ a single crossbar switch fabric to transfer cells from input buffers to output ports. This type of switch suffers from input and output cell contention problems which cause lower performance than for output buffer switches. However, dividing one crossbar fabric into several smaller crossbar fabrics, we can decrease the input and output contention probabilities. Based on this principle, we propose a new decomposed crossbar switch architecture. Since a decrease in input and output contention probabilities causes an increase in the grant probability for the cells at input buffers, the proposed decomposed crossbar switches yield better performance than conventional input switches. We derive the grant probability for a simple arbitration algorithm and evaluate the performance of the proposed switch architecture in terms of the average cell latency through simulation.
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Conventional input switches usually employ a single crossbar switch fabric to transfer cells from input buffers to output ports. This type of switch suffers from input and output cell contention problems which cause lower performance than for output buffer switches. However, dividing one crossbar fabric into several smaller crossbar fabrics, we can decrease the input and output contention probabilities. Based on this principle, we propose a new decomposed crossbar switch architecture. Since a decrease in input and output contention probabilities causes an increase in the grant probability for the cells at input buffers, the proposed decomposed crossbar switches yield better performance than conventional input switches. We derive the grant probability for a simple arbitration algorithm and evaluate the performance of the proposed switch architecture in terms of the average cell latency through simulation.
Key concepts: Crossbar switch, Computer science, Crossover switch, Latency (audio), Arbitration, Topology (electrical circuits), Parallel computing, Electrical engineering