Accurate VHDL libraries for ASIC design
Jianlu Wu, Tzay Y. Young, Eiji Kawamoto, W. Keutgens
Abstract
Jianlu Wu, Tzay Y. Young, Eiji Kawamoto, W. Keutgens
Abstract
The creation of a VHSIC hardware description language (VHDL) library with sign-off quality for a 0.8- mu m CMOS ASIC technology is described. The methodology used, the problems encountered, and accuracy and performance are discussed.>
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The creation of a VHSIC hardware description language (VHDL) library with sign-off quality for a 0.8- mu m CMOS ASIC technology is described. The methodology used, the problems encountered, and accuracy and performance are discussed.>
Key concepts: VHDL, Application-specific integrated circuit, Computer science, CMOS, Hardware description language, Computer architecture, Programming language, Embedded system