2003Unpublished venueRequires access

Circuit-simulation model of gate-drain-capacitance changes in small-size MOSFETs due to high channel-field gradients

D. Navarro, K. Hisamitsu, Toyoshi Yamaoka, M. Tanaka, Hiroaki Kawano, Hideki Ueno, Mitiko Miura-Mattausch, H. J. Mattausch, Shigetaka Kumashiro, T. Yamaguchi, K. Yamashita, N. Nakayama

Open publisher page 2 citations

Abstract

The field gradient along the MOSFET channel is included in the modeling of the gate-drain capacitance (C/sub gd/) by an induced capacitance approach. The new approach has been successfully implemented in surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing measured effects, which are particularly significant for pocket-implant technology, accurately.

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What this paper is about

The field gradient along the MOSFET channel is included in the modeling of the gate-drain capacitance (C/sub gd/) by an induced capacitance approach. The new approach has been successfully implemented in surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing measured effects, which are particularly significant for pocket-implant technology, accurately.

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OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The field gradient along the MOSFET channel is included in the modeling of the gate-drain capacitance (C/sub gd/) by an induced capacitance approach. The new approach has been successfully implemented in surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing measured effects, which are particularly significant for pocket-implant technology, accurately.

Key concepts: Capacitance, MOSFET, Materials science, Channel (broadcasting), Optoelectronics, Field-effect transistor, Logic gate, Field (mathematics)

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