A low-power, high-speed implementation of a PowerPC/sup TM/ microprocessor vector extension
M.S. Schmookler, M. Putrino, C. Roth, Manoj Sharma, Ann Mather, Jon Tyler, H. Van Nguyen, M. Pham, Jan Van lent
Abstract
M.S. Schmookler, M. Putrino, C. Roth, Manoj Sharma, Ann Mather, Jon Tyler, H. Van Nguyen, M. Pham, Jan Van lent
Abstract
The AltiVec/sup TM/ technology is an extension to the PowerPC architecture/sup TM/ which provides new computational and storage operations for handling vectors of various data lengths and data types. The first implementation using this technology is a low-cost, low-power processor based on the acclaimed PowerPC 750/sup TM/ microprocessor. This paper describes the microarchitecture and design of the vector arithmetic unit of this implementation.
OpenAlex reports 36 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
The AltiVec/sup TM/ technology is an extension to the PowerPC architecture/sup TM/ which provides new computational and storage operations for handling vectors of various data lengths and data types. The first implementation using this technology is a low-cost, low-power processor based on the acclaimed PowerPC 750/sup TM/ microprocessor. This paper describes the microarchitecture and design of the vector arithmetic unit of this implementation.
Key concepts: PowerPC, Microprocessor, Microarchitecture, Computer science, Extension (predicate logic), Power (physics), Architecture, Embedded system