Differential Power Analysis of FPGAs : How Practical is the Attack?

Recent developments in information technologies made the\nsecure transmission of digital data a critical design point. Large data\nflows have to be exchanged securely and involve encryption rates that\nsometimes may require hardware implementations. Reprogrammable devices\nsuch as Field Programmable Gate Arrays are highly attractive\nsolutions for hardware implementations of encryption algorithms and\nseveral papers underline their growing performances and flexibility for\nany digital processing application. Although cryptosystem designers frequently\nassume that secret parameters will be manipulated in closed\nreliable computing environments, Kocher et al. stressed in 1998 that actual\ncomputers and microchips leak information correlated with the data\nhandled. Side-channel attacks based on time, power and electromagnetic\nmeasurements were successfully applied to the smart card technology,\nbut we have no knowledge of any attempt to implement them against\nFPGAs. This paper examines how monitoring power consumption signals\nmight breach FPGA-security. We propose first experimental results\nagainst FPGA-implementations of cryptographic algorithms in order to\nconfirm that power analysis has to be considered as a serious threat\nfor FPGA security. We also highlight certain features of FPGAs that\nincrease their resistance against side-channel attacks.