A 0.5 V fully differential gate-input operational transconductance amplifier with intrinsic common-mode rejection
M. Abdulai, Peter R. Kinget
Abstract
M. Abdulai, Peter R. Kinget
Abstract
In this paper we present an ultra-low voltage gate-input operational transconductance amplifier using pMOS input devices and nMOS load devices with local common-mode feedback. This topology has a good intrinsic common-mode rejection. Simulations for a two-stage, 0.5 V fully differential operational transconductance amplifier (OTA) with a gain of 55 dB and a common-mode rejection ratio of 61 dB are reported. The amplifier consumes 77 /spl mu/W and has a gain-bandwidth product of 8.7 MHz when designed in 0.18 /spl mu/m CMOS technology.
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In this paper we present an ultra-low voltage gate-input operational transconductance amplifier using pMOS input devices and nMOS load devices with local common-mode feedback. This topology has a good intrinsic common-mode rejection. Simulations for a two-stage, 0.5 V fully differential operational transconductance amplifier (OTA) with a gain of 55 dB and a common-mode rejection ratio of 61 dB are reported. The amplifier consumes 77 /spl mu/W and has a gain-bandwidth product of 8.7 MHz when designed in 0.18 /spl mu/m CMOS technology.
Key concepts: Operational transconductance amplifier, Transconductance, Operational amplifier, NMOS logic, Direct-coupled amplifier, PMOS logic, Fully differential amplifier, Gain–bandwidth product