Design technology for systems on a chip

As ASIC designs make the transition to systems on a chip (SoC), designers wrestle with increased complexity, escalating development costs and accelerating design cycles. In addition, advancing technology is exacerbating formerly parasitic effects such as RC delay and capacitive coupling into first-order effects. Complex designs and advancing technology may be the cause of these problems, but new design technology will help address these challenges. This presentation gives a perspective on the new design technology being deployed in the near future, which will profoundly affect the way in which designs are produced.