2004Unpublished venueRequires access

Augmenting general purpose processors for network processing

Hamid Ghasemi, Hossein Mohammadi, Behnam Robatmili, Nuri Yazdani

Open publisher page 6 citations

Abstract

Growth of network line speeds and needs for new services in routers have led to the emergence of new generation of fast and scalable devices for packet processing. A special purpose processor designed for networking, called Network Processor or NP, performs special network processing tasks internally. Network processors must be flexible since the protocols and technology in the field change rapidly. This requires programmability while complicates the design process. Network processors are supposed to work in a speed close to ASIC and with programmability like GPPs. One approach in implementing network processors is augmenting general purpose architectures or instruction sets for network processing. In this paper, we introduce some special instructions and methods for improving general processors to work in network environment. These instructions are designed after studying different processing required in IP networks. We present experimental results to show the improvement achieved by adding these instructions to a modeled GPP. We also present the hardware implementation of these instructions to determine the cost of the real implementation.

About this research paper

What this paper is about

Growth of network line speeds and needs for new services in routers have led to the emergence of new generation of fast and scalable devices for packet processing. A special purpose processor designed for networking, called Network Processor or NP, performs special network processing tasks internally. Network processors must be flexible since the protocols and technology in the field change rapidly. This requires programmability while complicates the design process. Network processors are supposed to work in a speed close to ASIC and with programmability like GPPs. One approach in implementing network processors is augmenting general purpose architectures or instruction sets for network processing. In this paper, we introduce some special instructions and methods for improving general processors to work in network environment. These instructions are designed after studying different processing required in IP networks. We present experimental results to show the improvement achieved by adding these instructions to a modeled GPP. We also present the hardware implementation of these instructions to determine the cost of the real implementation.

Why it matters

OpenAlex reports 6 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Growth of network line speeds and needs for new services in routers have led to the emergence of new generation of fast and scalable devices for packet processing. A special purpose processor designed for networking, called Network Processor or NP, performs special network processing tasks internally. Network processors must be flexible since the protocols and technology in the field change rapidly. This requires programmability while complicates the design process. Network processors are supposed to work in a speed close to ASIC and with programmability like GPPs. One approach in implementing network processors is augmenting general purpose architectures or instruction sets for network processing. In this paper, we introduce some special instructions and methods for improving general processors to work in network environment. These instructions are designed after studying different processing required in IP networks. We present experimental results to show the improvement achieved by adding these instructions to a modeled GPP. We also present the hardware implementation of these instructions to determine the cost of the real implementation.

Key concepts: Network processor, Computer science, Packet processing, Scalability, Application-specific integrated circuit, Computer architecture, Networking hardware, Process (computing)

Related papers

Back to paper searchBrowse research topicsOriginal source
Augmenting general purpose processors for network processing — Research Paper | ScholarLens