A Highly Selective, Very Linear Low Noise Transconductance Amplifier Capable of Large-Signal Handling for Current-Mode Receivers Front-End
Mohammadreza Mehrpoo
Abstract
Open-access reader
Mohammadreza Mehrpoo
Abstract
Open-access reader
The staggering advances in mobile phone industry and wireless technologies have led to abundance of wireless and cellular standards over the past few years. Most of the emerging radio standards (such as 4G LTE and WiMax) require flexible RF transceivers capable of handling various bandwidths and modulation scheme. Meanwhile, the demand by manufacturers for miniaturization, power and cost reduction have compelled further integration of RF transceivers by juxtaposing multiple RF SoC cores on a single silicon die. The prominent challenge in multi-radio chips is blocker interference. Blocker constraint in cellular radios is very stringent, requiring external SAW filters or high performance duplexers. However, SAW filters are bulky and expensive; plus, they reduce the receiver flexibility and degrade the RX sensitivity by a few dB. To circumvent these issues, “true SAW-less” receivers (by removing the SAW filter at the input of the RX) have been proposed in the literature. To achieve the ultimate flexible and multi-core radio operation, wide-band RX RF front-ends robust against interference, in excess of the requirements usually specified by a radio standard, are required. In this work, a highly selective, very linear LNTA capable of large-signal handling for current-mode RX front-ends is proposed and implemented in 65-nm CMOS technology. It is shown that by combining the on-chip high-Q bandpass filters with a push/pull class-AB common-gate stage, a large desensitization point (B1dB) and large-signal IIP3 of +8 dBm and +20 dBm, respectively, can be achieved, with 1.5 V supply voltages and 7.5 mA current consumption. Meanwhile, by applying noise cancellation technique, via an auxiliary push/pull class-AB common-source stage, a moderate NF of 5.9 dB is possible, which is a very competitive number for such value of B1dB.
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The staggering advances in mobile phone industry and wireless technologies have led to abundance of wireless and cellular standards over the past few years. Most of the emerging radio standards (such as 4G LTE and WiMax) require flexible RF transceivers capable of handling various bandwidths and modulation scheme. Meanwhile, the demand by manufacturers for miniaturization, power and cost reduction have compelled further integration of RF transceivers by juxtaposing multiple RF SoC cores on a single silicon die. The prominent challenge in multi-radio chips is blocker interference. Blocker constraint in cellular radios is very stringent, requiring external SAW filters or high performance duplexers. However, SAW filters are bulky and expensive; plus, they reduce the receiver flexibility and degrade the RX sensitivity by a few dB. To circumvent these issues, “true SAW-less” receivers (by removing the SAW filter at the input of the RX) have been proposed in the literature. To achieve the ultimate flexible and multi-core radio operation, wide-band RX RF front-ends robust against interference, in excess of the requirements usually specified by a radio standard, are required. In this work, a highly selective, very linear LNTA capable of large-signal handling for current-mode RX front-ends is proposed and implemented in 65-nm CMOS technology. It is shown that by combining the on-chip high-Q bandpass filters with a push/pull class-AB common-gate stage, a large desensitization point (B1dB) and large-signal IIP3 of +8 dBm and +20 dBm, respectively, can be achieved, with 1.5 V supply voltages and 7.5 mA current consumption. Meanwhile, by applying noise cancellation technique, via an auxiliary push/pull class-AB common-source stage, a moderate NF of 5.9 dB is possible, which is a very competitive number for such value of B1dB.
Key concepts: RF front end, Duplexer, Transceiver, Electrical engineering, Amplifier, CMOS, Radio frequency, Electronic engineering