2003•Unpublished venueRequires access

An 1 V rail-rail low-power CMOS op-amp

Dingtzay Chen, Hongchin Lin

Abstract

A rail-rail CMOS operational amplifier (op-amp) using 0.35 /spl mu/m technologies for supply voltage of 1 V is proposed. The input stage is fully symmetric differential, while the regulated cascode gain stage with V/I feedback reduces the output offset. It is rail-rail at the inputs and the output with DC gain of 100 dB, CMRR of 65 dB, gain bandwidth of 1.1 MHz, and 40 /spl mu/W power dissipation.

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Available abstract

Key concepts: Cascode, CMOS, Input offset voltage, Operational amplifier, Electrical engineering, Open-loop gain, Fully differential amplifier, Bandwidth (computing)