Dynamic power management for embedded systems [SOC design]
Bishop Brock, Karthick Rajamani
Abstract
Bishop Brock, Karthick Rajamani
Abstract
This paper discusses several of the SOC design issues pertaining to dynamic voltage and frequency scalable systems, and how these issues were resolved in the IBM PowerPC 405LP processor. We also introduce DPM, a novel architecture for policy-guided dynamic power management. We illustrate the utility of DPM by its ability to implement several classes of power management strategies and demonstrate practical results for a 405LP embedded system.
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This paper discusses several of the SOC design issues pertaining to dynamic voltage and frequency scalable systems, and how these issues were resolved in the IBM PowerPC 405LP processor. We also introduce DPM, a novel architecture for policy-guided dynamic power management. We illustrate the utility of DPM by its ability to implement several classes of power management strategies and demonstrate practical results for a 405LP embedded system.
Key concepts: PowerPC, Computer science, Scalability, Power management, IBM, Embedded system, Computer architecture, Dynamic demand