A Boolean extraction technique for multiple-level logic optimization

Extraction is the most important step in global minimization. Its approach is to identify and extract subexpressions, which are multiple-cubes or single-cubes, common to two or more expressions which can be used to reduce the total number of literals in a Boolean network. Extraction is described as either algebraic or Boolean, according to the trade-off between run-time and optimization. Boolean extraction is capable of providing better results, but difficulty in finding common Boolean divisors arises. In this paper, we present a new method for Boolean extraction to remove the difficulty. The key idea is to identify and extract two-cube Boolean subexpression pairs from each expression in a Boolean network. Experimental results show improvements in literal counts over the extraction in SIS for some benchmark circuits.