A self-validated computation approach to symbolic analysis of analog integrated circuits

In this paper we present a new approach to symbolic analysis of analog integrated circuits that is based on the affine arithmetic models used in Self- Validated Computation (SVC). This approach preserves the interpretability of symbolic expressions, when MOS transistors are substituted with device models at different modeling levels (example simple model and high frequency model). The expressions, obtained using our approach, are compact and workable. The methodology suggested in this paper is illustrated with example and substantiated with results obtained from our symbolic analysis tool developed using MATLAB symbolic math toolbox.