A reconfigurable analog-to-digital converter for a mobile receiver

The evolution of new telecommunication standards is increasingly leaning towards higher data transmission rates. The boundaries between digital and analog signal processing is impending closer to the antenna, therefore aiming for a software-defined radio solution. In terms of analog-to-digital converters (ADCs) of mobile terminal receivers, this indicates higher sample rate, lower power consumption and higher resolution. With comparison to other ADCs, the pipelined ADC architecture has most successfiilly covered the wide resolution limits and data rate requirements of these terminal receiver architectures. However, even though fix word-length pipeline ADC architecture could be a suitable device for the mobile receiver, it still has a distinct disadvantage when it comes to power consumption. In this thesis, the requirements of ADC of the mobile receiver architecture are studied and analysed using the system specifications of the 3rd Generation (3G) Wideband Code Division Multiple Access (WCDMA) standard.