Design of Sequential Circuits Using MV Gates in Nanotechnology
Bahram Dehghan, Ahad Salimi
Abstract
Bahram Dehghan, Ahad Salimi
Abstract
Recent developments in reversible logic allow for improved quantum computer algorithms and schemes for corresponding computer architectures. Quantum dot Cellular Automata is an emerging technology for development of logic circuits based on nanotechnology, and it is one of the replacements for designing high performance computing over existing CMOS technology. Different logic gates like MV, NOT under QCA nanotechnology are introduced. Any Boolean functions, limited in thirteen number standard Boolean functions, are synthesized by MV and NNI gates or simply NNI gates alone, eliminating inverter (NOT) gate. The architecture of AND, OR, NAND, NOR gates by using MV gates have shown. Also, one of the other most applicable complete and efficient gates in digital systems and network are the XOR and XNOR gates. The design models of these gates have been exhibited. In this paper, we present the design of sequential circuits (RS Flip Flop, D Flip Flop, JK Flip Flop, T Flip Flop, Master Slave JK Flip Flop) and full subtractor/adder circuits based on MV gates and NOT gates. Furthermore, the number of gates and kind of them is considered.
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Recent developments in reversible logic allow for improved quantum computer algorithms and schemes for corresponding computer architectures. Quantum dot Cellular Automata is an emerging technology for development of logic circuits based on nanotechnology, and it is one of the replacements for designing high performance computing over existing CMOS technology. Different logic gates like MV, NOT under QCA nanotechnology are introduced. Any Boolean functions, limited in thirteen number standard Boolean functions, are synthesized by MV and NNI gates or simply NNI gates alone, eliminating inverter (NOT) gate. The architecture of AND, OR, NAND, NOR gates by using MV gates have shown. Also, one of the other most applicable complete and efficient gates in digital systems and network are the XOR and XNOR gates. The design models of these gates have been exhibited. In this paper, we present the design of sequential circuits (RS Flip Flop, D Flip Flop, JK Flip Flop, T Flip Flop, Master Slave JK Flip Flop) and full subtractor/adder circuits based on MV gates and NOT gates. Furthermore, the number of gates and kind of them is considered.
Key concepts: XNOR gate, AND-OR-Invert, Logic gate, NAND logic, Quantum dot cellular automaton, NOR logic, NAND gate, Digital electronics